CEA Institutes Combine 3D Integration Technologies & Many-Core Architectures to Enable High-Performance Processors That Will Power Exascale Computing

(c) CEA Invited paper at IEDM 2020 shows benefit of CEA-List's architectures in co-optimizing CEA-Leti's 3D toolbox to enable higher bandwidth & heterogeneity for high-performance processors. CEA Institutes Combine 3D Integration Technologies & Many-Core Architectures to Enable High-Performance Processors That Will Power Exascale Computing SAN FRANCISCO - Dec. In an invited paper at IEDM 2020, CEA-List and CEA-Leti, research institutes at CEA, presented their technologies for achieving exascale-level, highperformance computing (HPC). Highlighting CEA-Leti's state-of-the-art, 3D-technology toolbox and CEA-List's advanced demonstrators that together enable higher bandwidth and heterogeneity for processors, the paper explains architectural and performance advances and describes how 3D-integration technologies allow heterogeneity and increased bandwidth that are critical for hardware innovations that help enable exascale computing. Profound evolutions brought by high performance computing (HPC) applications are based on continuous and exponential increases in computing performances over the past decades, explained the paper, How 3D integration technologies enable advanced compute node for Exascale-level High Performance Computing'. Supercomputers will soon achieve exascale-level computing performances mainly thanks to the introduction of innovative hardware technologies around the processors. Exascale computing refers to computing systems capable of calculating at least 10¹', or one-billion-billion, floating-point operations per second, which would be twice as fast as the fastest computer available today.